SoC Verification Engineer

Build and enhance SystemVerilog/UVM-based verification environments . Develop C/C++ based testcases, models, and verification components for embedded and system-level validation. Work on co-simulation environments integrating software and hardware verification.

Perform functional, system, and regression testing to ensure design quality. Debug complex issues across hardware-software interfaces . Develop or use C/C++ reference models for scoreboarding and verification.

Collaborate with design, firmware, and validation teams to ensure end-to-end verification. Drive coverage closure and ensure sign-off readiness. Support post-silicon validation and bring-up activities when required.

Required Skills & Qualifications Bachelor’s/Master’s degree in Electronics, Electrical, Computer Engineering, or related field . 5 years of experience in SoC/ASIC verification . Strong programming skills in C/C++ (mandatory) .

Hands-on experience with: SystemVerilog and UVM Testbench development Experience in hardware-software co-verification . Good understanding of: Computer architecture / SoC architecture Embedded systems Knowledge of AMBA protocols (AXI/AHB/APB) . Experience with simulation/debug tools: VCS / Xcelium / Questa Familiarity with scripting (Python/Perl/Shell).

Strong debugging and analytical skills. Why Join Us Opportunity to work on complex, next-gen SoC products . Exposure to hardware-software integrated verification flows .

Dynamic and collaborative work culture. Strong growth and learning opportunities. Interested, Please share your updated resume on