Job Description
Senior Verification Engineer\nLocation: Bangalore/Hyderabad\nExperience: 4+ years\n\n1Must have very good System Verilog/UVM experience\nMust have expertise in PCI gen6 and CXL3.1or Ethernet bus protocols\nHave experience in IP/SoC Verification\nExpertise in AMBA/AXI bus protocols and ARM CPU\nExperience in developing functional verification environments including the components like monitors, checkers, scoreboards and assertions\nExperience in code and functional coverage\nScripting Language (PERL/Python/Shell/Makefile)\nMust have good debugging and problem-solving skills\nGood to have GLS verification experience\nEducational Qualification: BE/ME or BTech /MTech
