CPU power estimation and optimization
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Section |
Description (CPUFocused, SMTS Scope) |
|---|---|
Role Objective |
Act as the technical lead for CPU power estimation and optimization, shaping power strategy for highperformance CPU cores . Deliver credible power projections from early architecture through signoff and influence CPU design decisions across multiple generations. |
CPU Power Architecture Leadership |
• Define CPU power architecture including core, cache (L1/L2/L3) • Establish voltage domains power goals for each states, performance states, lowpower modes, and CPU usecase power envelopes • Drive powerperformancearea (PPA) tradeoffs for different goals for CPU units |
Architectural Feature Power Analysis (CPU) |
• Quantify power cost of CPU microarchitectural features (pipeline depth, width, speculation, cache structures, predictors, queues, buffers) • Evaluate power impact of ISA extensions, frequency targets, and workload characteristics • Use priorgeneration CPU data to guide nextgeneration architectural decisions |
CPU Power Estimation Strategy |
• Own early CPU power estimation using architecturelevel parameters (flops, SRAM bits, activity proxies, frequency, topology) • Define correlation strategy from early estimates → RTL power → physical implementation → silicon • Ensure estimates are actionable for CPU architecture and program planning decisions |
Modeling & Methodology Development |
• Develop and maintain CPUspecific power models at core and CCX • Drive scalable estimation frameworks (analytical, statistical, or MLassisted) suitable for early CPU planning • Standardize CPU power estimation methodologies across teams and programs |
CrossFunctional Technical Leadership |
• Partner with CPU Architects, RTL, Physical Design, CAD, and Platform teams to drive powerinformed decisions • Serve as reviewer for CPU power assumptions and estimates used in exec and design reviews • Mentor senior engineers in CPU power modeling and estimation techniques |
CPU Power Optimization & Direction Setting |
• Identify architectural powerreduction opportunities across core and uncore • Influence CPU roadmap decisions with quantified power impact and risk assessment • Balance peak performance goals with sustainable power efficiency |
System & Workload Awareness |
• Ensure CPU power models reflect realistic workloads (client, server, AI, mixed workloads) • Account for DVFS behavior, boosting, throttling, and residency in CPU power estimates |
Deliverables & Impact |
• CPU power architecture definitions adopted across multiple programs • Trusted early power estimates that meaningfully predict latestage and silicon power • Architectural tradeoff analyses that directly influence CPU design choices |
Required Experience |
• Deep expertise in CPU microarchitecture and power drivers • Strong background in power modeling, estimation, and correlation for highperformance CPUs • Proven ability to influence architecture decisions using quantitative power analysis |
PMTS Expectations |
• Recognized companywide expert in CPU power. • Sets technical direction beyond own team or project • Solves ambiguous, multiteam CPU power challenges • Work impacts multiple CPU generations or product lines |
Preferred Background |
• Advancednode CPU design experience
• Presilicon to postsilicon power correlation experience • Experience defining reusable CPU power methodologies adopted at scale #LI-Hybrid
#LI-RR1
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Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
Qualifications:Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
Education:UNAVAILABLEEmployment Type: FULL_TIME