DFT Senior Engineer

DFT Engineer :

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 5+ years of experience in DFT architecture, implementation, ATPG, and verification for SoCs.
• Experience with industry-standard test methodologies and platforms, such as (but not limited to) ATE, MBIST, JTAG, or System Level Test (SLT).

Preferred qualifications:

• Bachelors /Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Experience in DFT flow, including architecture, IP integration (Test controllers, TAP, MBIST), and interaction with synthesis and verification flows.
• Experience with industry-leading EDA tools for DFT, such as Synopsys (e.g., Design Compiler, DFT Max) or Siemens EDA (e.g., Tessent, TestKompress).
• Experience with silicon process and technology nodes for high speed and low power consumption.
• Experience with various fault models (e.g., Stuck-at, Transition, Cell-Aware, Path Delay, etc.).