DFT Engineer (Staff/Senior Staff Level)

Job DescriptionJob Description\n
\nAs a member of DFT engineering team, the candidate will develop methodologies and implement DFT for pre/post-silicon DFT flow and contribute to SOC/Automotive/RISC-V product test quality.\n
\nWork with senior engineers across disciplines (DE, IMP, PE, TE) to meet low cost and high quality DFT deliverables.\n
\nRequirementRequirement:\n
\n(Exp.- 7-12 Years)\n
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\nDetailed knowledge of Design for Testability and IC Design Flow.\n
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\nHands-on experience in post-silicon debug, ATE bring-up, low-power DFT methodologies, DFT architecture and sound understanding of DFT clocking strategies\n
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\nExperience with tools (Synopsys/Siemens) and methodologies for DFT\n
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\nExperience with Automotive Low DPPM DFT / LBIST /IST\n
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\nHierarchical DFT, LBIST, MBIST, Diagnosis flows\n
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\nStrong DFT SCAN implementation skills, top DFT architecture , SCAN STA / SDC handling , DFT timing closure\n
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\nStrong ATPG verification background, coverage improvement, simulation debug skills.\n
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\nGood software and scripting skills\n
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\nAbility to work in a team environment