Lead FPGA Design Engineers

Job Title: Lead FPGA Design Engineer

Experience Required: 7–12 years

Location: Hyderabad/Bangalore

Job Type: Full-time

Industry: Semiconductor / Electronics / Embedded Systems

Job Summary:

We are looking for a highly skilled and experienced Lead FPGA Design Engineer to join our hardware design team. The ideal candidate will lead the design, implementation, verification, and validation of FPGA-based systems for complex hardware products. This role involves mentoring junior engineers, collaborating with cross-functional teams, and ensuring delivery of high-performance, high-reliability designs.

Key Responsibilities:

\n
• Lead architecture definition and design of complex FPGA solutions using VHDL/Verilog/SystemVerilog.
\n
• Translate system-level requirements into FPGA design specifications.
\n
• Hands-on implementation of FPGA designs using Xilinx, Intel (Altera), or Lattice FPGAs.
\n
• Develop testbenches and perform simulation using tools like ModelSim, Questa, or VCS.
\n
• Integrate and validate FPGA designs on hardware, working closely with board design and software teams.
\n
• Use industry-standard tools such as Vivado, Quartus, Synplify, etc.
\n
• Lead FPGA timing closure, floor planning, and resource optimization.
\n
• Perform version control, documentation, and design reviews.
\n
• Guide and mentor a team of junior engineers; ensure design best practices and quality processes are followed.
\n

Required Skills and Experience:

\n
• Bachelor’s or Master’s degree in Electronics/Electrical/Computer Engineering.
\n
• 7+ years of industry experience in FPGA design and verification.
\n
• Expertise in VHDL/Verilog/SystemVerilog coding and simulation.
\n
• Experience with FPGA toolchains such as Xilinx Vivado, Intel Quartus, Synplify.
\n
• Strong knowledge of high-speed interfaces (e.g., PCIe, DDR, Ethernet, AXI).
\n
• Familiar with embedded processor systems (MicroBlaze, Nios II, ARM SoCs).
\n
• Proficiency in scripting (Tcl, Python, Shell) for automation.
\n
• Experience with static timing analysis, constraints definition (SDC), and debugging.
\n
• Good understanding of hardware/software integration.
\n
• Excellent leadership, problem-solving, and communication skills.
\n

Preferred Qualifications:

\n
• Prior experience in leading FPGA teams or projects.
\n
• Exposure to safety-critical or mission-critical design environments (e.g., automotive, aerospace, medical).
\n
• Experience with hardware emulation or ASIC prototyping on FPGAs.
\n
• Familiarity with version control systems (Git, SVN) and documentation tools.
\n

Why Join Us?

\n
• Work on cutting-edge FPGA designs in a collaborative environment.
\n
• Competitive compensation with leadership opportunities.
\n
• Growth-focused, innovation-driven engineering culture.
\n

Interested can share CV to [email protected]